With the increasing number of applications for computer systems, the demand for computer systems continues to expand. To meet the increasing demand and expanding customer base, computer systems have been provided with ever increasing performance characteristics. The increasing speed of central processing units or CPUs is very apparent. However, to take maximum advantage of the faster CPUs, the other basic computer subsystems must also be constantly improved to be capable of running at the higher system speeds. Moreover, increasing application complexities have also placed greater demands on computer subsystems so that the computer systems not only run at faster speeds but also are capable of handling much more complex applications and data handling requirements.
In computer systems, cache memory subsystems have become a critical area for improvement. More specifically, wordline driver circuits, which control the memory cells in cache arrays, have not undergone many changes. In the past, wordline drivers were simple and straight forward because caches were simple and there were fewer operations implemented in the cache. With more powerful, faster and more complex microprocessors, cache subsystems and wordline driver circuits must also be improved to make optimum use of the increased CPU capabilities. For most applications, the size and speed of the cache circuitry must be improved to allow greater amounts of programming and data to be available for even faster access by the CPU in running modern complex computer applications. As bandwidths increase, however, timing problems may be created, which in some cases may be sufficiently severe to affect the reliability of the circuit. Thus, there is a need for an improved cache subsystem and cache controlling circuitry in order to provide even greater cache capabilities for modern computer system applications.